Live Demo
Accelerating Scientific Applications with MVAPICH2-DPUs
HPC and AI communication frameworks and libraries are bandwidth-sensitive, and they play a critical role in determining application performance. Offloading the libraries from the host CPU to the NVIDIA® BlueField® data processing unit (DPU) creates the highest degree of overlap for parallel progression of communication and computation. This also reduces OS jitter, while dramatically increasing application performance, which is key to enabling a cloud-native supercomputing architecture.
Join this live demo session to interact with MVAPICH2-DPU library developers and learn how to accelerate Message Passing Interface (MPI)-based scientific applications on clusters with NVIDIA BlueField DPUs. The demo will cover:
- Running the production-quality MVAPICH2-DPU MPI library on an InfiniBand cluster with NVIDIA DPU technology
- The benefits of offloading the non-blocking all-to-all to the BlueField DPU’s Arm® cores using the MVAPICH2-DPU library
- Speeding up the P3DFFT application with the offloaded non-blocking all-to-all
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DGX Station Whitepaper
Dive deeper into the DGX Station and learn more about the architecture, NVLink, frameworks, tools and more.
Dive deeper into the DGX Station and learn more about the architecture, NVLink, frameworks, tools and more.
DGX Station Whitepaper
Dive deeper into the DGX Station and learn more about the architecture, NVLink, frameworks, tools and more.
Dive deeper into the DGX Station and learn more about the architecture, NVLink, frameworks, tools and more.
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Speakers
Gilad Shainer
SVP Marketing, Networking, NVIDIAGilad Shainer serves as senior vice president of marketing for networking at NVIDIA, focusing on high performance computing, artificial intelligence, and the InfiniBand technology. Shainer joined Mellanox in 2001 as a design engineer and has served in senior marketing management roles since 2005 at Mellanox and now NVIDIA. He is also the chairman of the HPC-AI Advisory Council organization, the president of UCF and CCIX consortiums, a member of IBTA, and a contributor to the PCISIG PCI-X and PCIe specifications. Shainer holds multiple patents in the field of high speed networking. He is also a recipient of the 2015 R&D100 award for his contribution to the CORE-Direct In-Network Computing technology and the 2019 R&D100 award for his contribution to the Unified Communication X (UCX) technology. Shainer holds an MSc degree and a BSc degree in Electrical Engineering from the Technion Institute of Technology in Israel.
Dhabaleswar K (DK) Panda
CEO, X-ScaleSolutionsDK Panda is the founder and CEO of X-ScaleSolutions and a professor and Distinguished Scholar of Computer Science at The Ohio State University. He obtained his PhD in computer engineering from the University of Southern California. His research interests include parallel computer architecture, high performance networking, InfiniBand, network-based computing, exascale computing, deep learning, programming models, GPUs and accelerators, high performance file systems and storage, virtualization and cloud computing and big data (Hadoop - HDFS, MapReduce, and HBase - and Memcached). He has published over 500 papers in major journals and at international conferences related to these research areas. Dr. Panda has served as program chair/co-chair/vice chair of many international conferences and workshops, and has served as program committee member for more than 100 international conferences and workshops, as an IEEE Distinguished Visitor, and an IEEE Chapters Tutorial Speaker. He has delivered a large number of invited keynote/plenary talks, tutorials, and presentations worldwide. Dr. Panda is a Fellow of IEEE and a member of ACM.
Donglai Dai
Chief Engineer, X-ScaleSolutionsDr. Donglai Dai is a chief engineer at X-ScaleSolutions and leads the company’s R&D team. His current work focuses on developing scalable efficient communication libraries, checkpointing and restart libraries, and performance analysis tools for distributed and parallel HPC and deep learning applications on HPC systems. He has more than 20 years of industry experience in engineering management and development of computer systems, VLSI, IoT, and interconnection networks from his time at Intel, Cray, SGI, and various startups. He holds more than 10 US granted patents and has published more than 30 technical papers or book chapters. He also has a PhD degree in computer science from The Ohio State University.
Hari Subramoni
Sr. Systems Architect, X-ScaleSolutionsHari Subramoni is the senior software architect at X-ScaleSolutions and leads the design and development of MVAPICH2-DPU software stack. Subramoni received his PhD in computer science from The Ohio State University, where he's now a research scientist. His current research interests include high performance interconnects and protocols, parallel computer architecture, network topology-aware computing, quality of service, fault tolerance, virtualization, big data, and cloud computing. Subramoni has published over 80 papers in international journals and conferences related to these research areas. Most recently, his focus has been on the design and development of MVAPICH2, MVAPICH2-GDR, and MVAPICH2-X software packages. See more details at: http://www.cse.ohio-state.edu/~subramon.
Nick Sarkauskas
Software Engineer, X-ScaleSolutionsNick Sarkauskas is a software engineer at X-ScaleSolutions and a PhD student in Computer Science and Engineering at The Ohio State University. His current work at X-ScaleSolutions is on the design and development of the MVAPICH2-DPU software stack. His research interests include high performance computing, high performance interconnects, and parallel algorithms. Nick Sarkauskas received a B.S. degree in Computer Science and Engineering from The Ohio State University in 2020. More details are available at nsarka.com. .
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